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PD -97143
IRFB3006PBF
HEXFET(R) Power MOSFET
Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free
D
VDSS RDS(on) typ. max. ID (Silicon Limited) ID (Package Limited)
D
60V 2.1m: 2.5m: 270A c 195A
S
G
D
S
TO-220AB
G D S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25C ID @ TC = 100C ID @ TC = 25C IDM PD @TC = 25C VGS dv/dt TJ TSTG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Wire Bond Limited) Pulsed Drain Current d Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery f Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw
Max.
270c 190 c 195 1080 375 2.5 20 10 -55 to + 175 300 10lbxin (1.1Nxm) 320 See Fig. 14, 15, 22a, 22b,
Units
A
W W/C V V/ns
C
Avalanche Characteristics
EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy e Avalanche Current d Repetitive Avalanche Energy g mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA
Parameter
Junction-to-Case k Case-to-Sink, Flat Greased Surface Junction-to-Ambient jk
Typ.
--- 0.50 ---
Max.
0.4 --- 62
Units
C/W
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1
10/6/08
IRFB3006PBF
Static @ TJ = 25C (unless otherwise specified)
Symbol
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS RG
Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
Min. Typ. Max. Units
60 --- --- 2.0 --- --- --- --- --- --- 0.07 2.1 --- --- --- --- --- 2.0 --- --- 2.5 4.0 20 250 100 -100 ---
Conditions
V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 5mAd m VGS = 10V, ID = 170A g V VDS = VGS, ID = 250A A VDS = 60V, VGS = 0V VDS = 60V, VGS = 0V, TJ = 125C nA VGS = 20V VGS = -20V
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR)
Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd)
Min. Typ. Max. Units
--- 200 37 60 140 16 182 118 189 8970 1020 534 1480 1920 --- 300 --- --- --- --- --- --- --- --- --- --- --- S nC
Conditions
VDS = 25V, ID = 170A ID = 170A VDS =30V VGS = 10V g ID = 170A, VDS =0V, VGS = 10V VDD = 39V ID = 170A RG = 2.7 VGS = 10V g VGS = 0V VDS = 50V = 1.0 MHz, See Fig. 5 VGS = 0V, VDS = 0V to 48V i, See Fig. 11 VGS = 0V, VDS = 0V to 48V h
280 --- --- --- --- Turn-On Delay Time --- Rise Time --- Turn-Off Delay Time --- Fall Time --- Input Capacitance --- Output Capacitance --- Reverse Transfer Capacitance --- Effective Output Capacitance (Energy Related) --- Effective Output Capacitance (Time Related)h ---
ns
pF
Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) d Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- 270c --- 1080 A A
Conditions
MOSFET symbol showing the integral reverse
D
G S
--- --- 1.3 V --- 44 --- ns --- 48 --- --- 63 --- nC TJ = 125C --- 77 --- --- 2.4 --- A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode. TJ = 25C, IS = 170A, VGS = 0V g TJ = 25C VR = 51V, IF = 170A TJ = 125C di/dt = 100A/s g TJ = 25C
Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140) Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.022mH RG = 25, IAS = 170A, VGS =10V. Part not recommended for use above this value .
ISD 170A, di/dt 1360A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as When mounted on 1" square PCB (FR-4 or G-10 Material). For recom R is measured at TJ approximately 90C.
Coss while VDS is rising from 0 to 80% VDSS. mended footprint and soldering techniques refer to application note #AN-994.
2
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IRFB3006PBF
1000
TOP
1000
VGS 15V 10V 8.0V 6.0V 5.0V 4.5V 4.0V 3.5V TOP VGS 15V 10V 8.0V 6.0V 5.0V 4.5V 4.0V 3.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
100
10
3.5V 60s PULSE WIDTH Tj = 175C
10 0.1 1 10 100
3.5V
1 0.1 1
60s PULSE WIDTH Tj = 25C
10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1000
2.5
Fig 2. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
ID = 170A
2.0
ID, Drain-to-Source Current()
VGS = 10V
100
(Normalized)
TJ = 175C
1.5
TJ = 25C
10
1.0
VDS = 25V
1 2.0 3.0 4.0 5.0
60s PULSE WIDTH
6.0 7.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
16000
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
Fig 4. Normalized On-Resistance vs. Temperature
16
VGS, Gate-to-Source Voltage (V)
ID= 170A 12
VDS = 48V VDS = 30V
12000
C, Capacitance (pF)
Ciss 8000
8
4000
4
Coss Crss
0 1 10 VDS , Drain-to-Source Voltage (V) 100
0 0 40 80 120 160 200 240 280 QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFB3006PBF
1000
10000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
TJ = 175C
100
OPERATION IN THIS AREA LIMITED BY R DS (on) 100sec
1000
100
LIMITED BY PACKAGE
10
TJ = 25C
1
10
1msec 10msec
1
VGS = 0V
0.1 0.0 0.4 0.8 1.2 1.6 2.0
Tc = 25C Tj = 175C Single Pulse 0.1 1 10
DC
0.1 100
VSD , Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage
Fig 8. Maximum Safe Operating Area
80
300 LIMITED BY PACKAGE 250
ID , Drain Current (A)
ID = 5mA
75
200 150 100 50 0 25 50 75 100 125 150 175 TC , Case Temperature (C)
70
65
60
55 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
2.0
Fig 10. Drain-to-Source Breakdown Voltage
1400
EAS, Single Pulse Avalanche Energy (mJ)
1200 1000 800 600 400 200 0
1.5
ID 20A 27A BOTTOM 170A
TOP
Energy (J)
1.0
0.5
0.0 0 10 20 30 40 50 60
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting TJ, Junction Temperature (C)
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
4
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IRFB3006PBF
1
Thermal Response ( Z thJC )
D = 0.50
0.1
0.20 0.10 0.05
0.01
0.02 0.01
J
R1 R1 J 1 2
R2 R2 C
Ri (C/W) 0.22547
(sec)
0.006073
1
2
0.175365 0.000343
Ci= i/Ri
0.001
SINGLE PULSE ( THERMAL RESPONSE )
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.0001 0.001 0.01 0.1
0.0001 1E-006 1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse)
Avalanche Current (A)
100
0.01 0.05
10
0.10
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C.
1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
400
EAR , Avalanche Energy (mJ)
300
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 170A
200
100
Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
175
0 25 50 75 100 125 150
Starting TJ , Junction Temperature (C)
PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRFB3006PBF
4.0
20
VGS(th) Gate threshold Voltage (V)
ID = 1.0A
3.5
ID = 1.0mA ID = 250A
16
3.0
2.5
IRRM - (A)
12
8 IF = 112A VR = 51V TJ = 125C TJ = 25C 100 200 300 400 500 600 700 800
2.0
1.5
4
1.0 -75 -50 -25 0 25 50 75 100 125 150 175
0
TJ , Temperature ( C )
dif / dt - (A / s)
Fig 16. Threshold Voltage Vs. Temperature
20
Fig. 17 - Typical Recovery Current vs. dif/dt
700 600
16
500
QRR - (nC)
IF = 170A VR = 51V TJ = 125C TJ = 25C 100 200 300 400 500 600 700 800
IRRM - (A)
12
400 300 200 100 0 100 200 300 400 IF = 112A VR = 51V TJ = 125C TJ = 25C 500 600 700 800
8
4
0
dif / dt - (A / s)
dif / dt - (A / s)
Fig. 18 - Typical Recovery Current vs. dif/dt
700 600 500
Fig. 19 - Typical Stored Charge vs. dif/dt
QRR - (nC)
400 300 200 100 0 100 200 300 400 500 600 700 800 IF = 170A VR = 51V TJ = 125C TJ = 25C
dif / dt - (A / s)
6
Fig. 20 - Typical Stored Charge vs. dif/dt
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IRFB3006PBF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
V(BR)DSS
15V
tp
DRIVER
VDS
L
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01
I AS
Fig 22a. Unclamped Inductive Test Circuit
VDS VGS RG RD
Fig 22b. Unclamped Inductive Waveforms
VDS 90%
D.U.T.
+
- VDD
V10V GS
Pulse Width 1 s Duty Factor 0.1 %
10% VGS
td(on) tr t d(off) tf
Fig 23a. Switching Time Test Circuit
Current Regulator Same Type as D.U.T.
Fig 23b. Switching Time Waveforms
Id Vds Vgs
50K 12V .2F .3F
D.U.T. VGS
3mA
+ V - DS
Vgs(th)
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Qgd
Qgodr
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Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
7
IRFB3006PBF
Dimensions are shown in millimeters (inches)
TO-220AB Package Outline
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 ASS EMBLED ON WW 19, 2000 IN T HE ASS EMBLY LINE "C" Note: "P" in as sembly line position indicates "Lead - Free" INT ERNAT IONAL RECT IFIER LOGO AS SEMBLY LOT CODE PART NUMBER
DAT E CODE YEAR 0 = 2000 WEEK 19 LINE C
TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
8
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 10/08
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